1. Field of the Invention
The present invention relates to a Faraday Cage for use in conjunction with plasma etching of semiconductor wafers. More particularly, the present invention relates to an improved Faraday Cage for use with a barrel-style plasma etcher in order to provide enhanced radiation protection for semiconductor wafers during the plasma etching process.
2. Description of Related Art
A Faraday Cage is a cylindrical device of perforated metal designed for use in conjunction with a plasma etcher. The Cage serves to inhibit radiation damage to semiconductor wafers during plasma etching. Although the following discussion is directed to silicon wafers, it should be understood that the concepts discussed apply to the etching of any semiconductor material. FIG. 1 shows a side view of a typical prior art Faraday Cage 8 containing a number of silicon wafers 10. The wafers 10 are placed end-to-end in the Cage 8 generally perpendicular to its longitudinal axis, and supported within the Cage 8 by one or more racks 4 as shown in FIG. 2. Each silicon wafer 10 contains a gridwork of dies 6. The plasma chemically reacts with and thereby etches certain portions of the dies in accordance with a photoresist pattern applied and selectively activated in prior manufacturing steps. After further etching and processing steps the wafer gridwork is separated into individual dies to form integrated circuits.
In a typical barrel-style plasma etching process, the prior art Faraday Cage 8 containing wafers 10 is placed within a quartz reactor vessel which generates and confines the plasma. The oblong metal periphery of the Faraday Cage reduces the flux of harmful ions entering the Cage while desirable uncharged radicals and other neutral molecules are free to enter through perforations 7. The radicals and other molecules which pass through the Cage perforations chemically react with the wafers in accordance with the predetermined pattern of the selectively activated photoresist. The prior art Cage serves to reduce the quantity of ions which can reach the wafers by grounding and thereby neutralizing the charged ions which strike its metallic outer surface. Further details on the use of prior art Faraday Cages in conjunction with plasma etching may be found in VLSI Fabrication Principles by Sorab K. Ghandi.
An important problem with the prior art Faraday Cage described above is its inability to adequately restrict undesirable ion penetration. As shown in FIGS. 1 and 2, a typical prior art Faraday Cage is open at each end 2, 3 of the Cage 8. Substantial amounts of charged ion radiation can penetrate the open ends 2, 3 and damage the wafers 10 contained therein. The unrestricted entry of harmful ions at either end of the cage results in higher etch rates for the wafers that are at or near the ends of the Cage and significantly increased ion damage for all wafers within the cage. Uneven etching rates and other ion induced damage result in a significant number of defective dies, and thereby increase labor, material and production costs and reduce integrated circuit manufacturing efficiency.
As is apparent from the above, there presently is a need for an improved Faraday Cage which can substantially reduce the ion damage resulting from plasma etching and thereby enhance the efficiency of the integrated circuit manufacturing process. The improved Faraday Cage should permit uniform etch rates and a higher yield of acceptable dies from a given plasma etched wafer, thereby reducing material and production costs. Furthermore, the improved Faraday Cage should be readily adaptable for convenient placement within a typical barrel-style plasma etcher. The improved Faraday Cage should provide these advantages while maintaining the accessibility and simple construction associated with the prior art Faraday Cages.